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Chapter 5: BIOS setup
Chapter 5
PCI Latency Timer [32 PCI Bus Clocks]
Value to be programmed into PCI latency timer register.
Clocks] [128 PCI Bus Clocks] [160 PCI Bus Clocks] [192 PCI Bus Clocks] [224 PCI
Bus Clocks] [248 PCI Bus Clocks]
VGA Palette Snoop [Disabled]
Allows you to enable/disable the VGA pallette registers snooping.
PERR# Generation [Disabled]
Allows you to enable/disable the PCI device to generate PERR#.
SERR# Generation [Disabled]
Allows you to enable/disable the PCI device to generate SERR#.
Load RT32 Image [Enabled]
Allows you to enable/disable RT32 Image Loading.
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